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Patent Searching and Data


Title:
FRAME PATTERN SETTING DEVICE IN DIGITAL SIGNAL MULTIPLEXER
Document Type and Number:
Japanese Patent JPH03270332
Kind Code:
A
Abstract:

PURPOSE: To avoid erroneous setting of a frame pattern by providing a frame pattern generating section receiving mount location information of a sub- multiplex circuit from a frame pattern information section provided in a frame and generating a prescribed frame pattern corresponding to the information to the sub-multiplex circuit.

CONSTITUTION: A sub-multiplex circuit 2 is fitted to a frame 3. Thus, a prescribed frame pattern is generated corresponding to frame pattern information inputted from a frame pattern information section 4 provided in the frame 3. Thus, a same frame pattern is always generated from the sub-multiplex circuit 2 fitting to a same location as the frame 3. thus, error in the frame pattern setting is avoided and the transmission of the signal without error is attained.


Inventors:
TAKAHASHI TATSU
Application Number:
JP6910690A
Publication Date:
December 02, 1991
Filing Date:
March 19, 1990
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04J3/00; H04J3/02; (IPC1-7): H04J3/00; H04J3/02
Attorney, Agent or Firm:
Teiichi Ijiba (2 outside)