PURPOSE: To omit a special framing code extracting circuit by constituting the detecting circuit that a framing timing is detected in the process of error correction in the framing synchronism reproduction representing the sectioning of a code of a character code broadcast.

CONSTITUTION: The transmission side transmits a character code broadcast packet signal while adding a PN (pseudo random pulse) code to a specific range of the packet signal. The reception side fetches a packet signal comprising a character code information section 304, a service identification section 300 and a parity signal and a signal of nearly 1 byte before and after the parity signal to a CPU from the received packet signal. Then a receiver detects the framing timing of a signal 401 fetched in the CPU in the process of the error correction. That is, after the head of the reception signal 401 is operated with the PN code 303 as the framing timing, the error correction is performed. If many error exist, a position shifted by one bit is taken as the framing timing and the similar operation is repeated. Since the error is least when the timing is correct, this point of time is detected as the framing timing.