To realize a desired linear demodulation band, even if the delay of a delay circuit has dispersion by adopting a variable logical threshold for a logic arithmetic circuit that NORs an output signal of an amplifier and an output signal of the delay circuit.

A logic arithmetic circuit 405 receives an input FM signal, that is binary-amplified by a limiter amplifier 402 and a signal resulting from delaying the FM signal for a prescribed time period by a delay circuit 403 and inverted by an inverter 404. Let a signal given from the limiter amplifier 402 to the logic arithmetic circuit 405 be Vin1 and the signal given from the inverter 404 to the logic arithmetic circuit 405 be Vin2, then the logic arithmetic circuit 405 NORs the signals Vin1, Vin2, by using a variable logical threshold Vref for a reference and provides an output of a pulse output Vout that starts rising, when both the signals Vin1, Vin2 reaches the logical threshold Vref or below and falling, when either of the signals Vin1, Vin2 exceeds the logical threshold Vref.