PURPOSE: To act the circuit like (N-0.5)-ary counter by providing an N-ary counter giving a command signal in case of overflow and an inverting/ noninverting control circuit giving an output to the N-ary counter through alternate inversion/noninversion to an input signal at each reception of the command signal.

CONSTITUTION: The frequency division circuit acts like a (3-0.5)-ary counter. An output signal UO1 goes to an H level at a 3rd trailing of a clock UI1. Then the clock UI1 is subject to inversion/noninversion by the operation of the inverting/noninverting control circuit and the result is given to a binary counter 11 with reset. Then a pulse with a slightly shorter wavelength than a half period of the clock UI1 is inserted. Thus, the 3rd trailing of the signal A is generated at the (3-0.5) period of the clock UI1. That is, the frequency division circuit outputs the output signal UO1 of an H level with a short wavelength for each of (3-0.5) period of the clock UI1 and acts like a 2.5-ary counter.