PURPOSE: To compose the frequency divider circuit of a logic circuit only and to make it into an integrated circuit by synthesizing the outputs of counter circuits to be operated with inverse phases each other.

CONSTITUTION: A counter circuit 2 is provided to be operated with the same phase to an input clock, an inverse phase counter circuit 3 is provided to be operated with the inverse phase at 180° to this input clock, and a synthesizing gate 4 is provided to OR the outputs of these counter circuits 2 and 3. The frequency of the clock inputted from a clock input terminal 1 is divided by the in-phase counter circuit 2 and the inverse phase counter circuit 3 respectively, and the OR of the outputs is synthesized. Namely, the phases of the outputs from the in-phase counter circuit 2 and the inverse phase counter circuit 2 are outputted while being shifted for the 1/2 time of the input clock and by 0Ring those outputs, the frequency divided output of a duty ratio 50% can be obtained only by the logic circuit even when a frequency dividing ratio is an odd number.