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Title:
FREQUENCY DIVIDER CIRCUIT
Document Type and Number:
Japanese Patent JPH05160721
Kind Code:
A
Abstract:

PURPOSE: To use a frequency divider circuit whose frequency division ratio is selected with a simple circuit and to attain circuit integration inexpensively with high general-purpose performance by closing a gate circuit with a pulse extract signal, applying an input signal after a pulse is extracted or applying the input signal independently on the pulse extract signal through the opened gate circuit.

CONSTITUTION: A pulse extract circuit 1 extracts one pulse for one frequency division period of a frequency divider 2-2 from a clock 50 whose frequency is fo generated from a VCO when a control signal 60 outputted from an extract control circuit 3 is '0' (compatible with the 8mm system) and outputs the result as a clock 55 to a frequency divider 2-1. Thus, in this case, the pulse extract circuit 1 and the frequency divider 2-1 act like a frequency divider of 1/(5+1) equivalently. However, since the pulse extraction by the pulse extract circuit 1 is not implemented when the control signal 60 outputted from the extract control circuit 3 is '1' (compatible with the VHS system), the clock 50 passes through the circuit 1 and is outputted as it is as the clock 55.


Inventors:
KOUNO KOUUN
Application Number:
JP32187691A
Publication Date:
June 25, 1993
Filing Date:
December 05, 1991
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H03K21/00; H03K23/64; (IPC1-7): H03K21/00; H03K23/64
Attorney, Agent or Firm:
Takashi Honda



 
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