To provide a frequency divider that eliminates variations in a duty ratio of an output clock.

A frequency divider has: a clock generation circuit that combines first and second trigger clocks having a first phase difference to generate a third clock having pulse edges corresponding to pulse edges of the first and second trigger clocks; an output frequency division circuit that divides the third clock into 1/2 frequency to generate differential first and second output clocks having a duty ratio corresponding to the first phase difference; and a phase modification circuit that detects a phase of the first or second output clock at timing of the pulse edge of the first or second trigger clock, and generates a phase modification signal for resetting the output frequency division circuit in the case that the detected phase is not a normal phase.