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Title:
FREQUENCY DIVIDER WITH SLIP
Document Type and Number:
Japanese Patent JP2006254451
Kind Code:
A
Abstract:

To synchronize two clocks with each other in initiation in a certain specific circuit.

An apparatus has a frequency divider accepting a clock 106. The frequency divider 104 is selectable between an N divide factor and an M divide factor via a divide mode signal, where an absolute value of (N-M)=1. The apparatus also has a pulse generator 100 responsive to a slip signal 112 and driven by an output 108 of the frequency divider and providing the divide mode signal 102 to the frequency divider 104.


Inventors:
ROBAATO EICHI MIRAA JIYUNIA
Application Number:
JP2006062230A
Publication Date:
September 21, 2006
Filing Date:
March 08, 2006
Export Citation:
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Assignee:
AVAGO TECHNOLOGIES GENERAL IP
International Classes:
H03K5/00; G06F1/06; H03K23/64; H03L7/00
Attorney, Agent or Firm:
Satoshi Furuya
Takahiko Mizobe
Kiyoharu Nishiyama