Title:
FREQUENCY DIVIDER
Document Type and Number:
Japanese Patent JP3536073
Kind Code:
B2
Abstract:
PURPOSE: To obtain the frequency divider with decimal fraction in which switchover and setting of a frequency division ratio are conducted at a high speed in order to reduce phase noise of a frequency synthesizer so as to increase a response speed.
CONSTITUTION: The frequency divider (frequency divider with decimal fraction) conducting frequency division of a frequency division ratio including a decimal fraction is provided with a pre-stage frequency divider means 2 setting plural integer frequency division ratio, a post-stage frequency divider means (shift register) 4A, a bit selector 13A, a CA value generator 11 and a ΣΔ modulator 10. The setting of the frequency division ratio of the pre-stage frequency divider means 2, a period of a frequency division output signal, a frequency division ratio of the post-stage frequency divider is switched to attain frequency division with a decimal fraction. A shift register is employed for the post-stage frequency divider means without adoption of a programmable counter at a slow speed to attain a fast setting changeover speed.
Inventors:
Komatsu, Yasuaki
Yanagimoto, Yoshiyuki
Yanagimoto, Yoshiyuki
Application Number:
JP14966195A
Publication Date:
June 07, 2004
Filing Date:
May 24, 1995
Export Citation:
Assignee:
HEWLETT PACKARD JAPAN LTD
International Classes:
H03L7/183; H03K23/00; H03K23/54; H03K23/68; H03L7/197; (IPC1-7): H03L7/183; H03K23/00; H03L7/197
Attorney, Agent or Firm:
加藤 公久