PURPOSE: To perform a secure operation by providing feedback from the output of an inverting gate through a capacitor and from an input of the inverting gate to one input of an NAND gate.
CONSTITUTION: An input from an input terminal IN is at a level L and the potential at a point (d) is lower than the threshold level Vth6 of the NAND gate 3 in a time area I , so the output of the NAND gate 3 is at a level H. Then, this level H is inverted by the inverter 4 and the level at a point (c) is L. The input is at the level H in a time area II, but the potential at the point (d) is lower than Vth6, so the output is at the level H. Then, the point (c) is at the level L. Further, the potential at the point (d) does not attain to Vth6 similarly in a time area III, so it is at the level H and the point (c) is at the level L. The input is at the H level in a time area IV and the potential at the point (d) exceeds Vth6, so the output is at the level L. The point (c) is therefore at the level H.
HASHI TOSHIO
CHIBA KAZUHARU
