Title:
FREQUENCY DIVIDING DEVICE
Document Type and Number:
Japanese Patent JPH05308280
Kind Code:
A
Abstract:
PURPOSE: To generate a clock signal of plural sampling frequencies with one oscillating frequency.
CONSTITUTION: An integral part of a frequency division number set by a frequency division register 200 is fetched by a subtraction counter 202, in which the integral part is subtracted. The result of subtraction is decoded by a decoder 204 and a pulse subjected to 1/9 frequency division and a pulse subjected to 1/10 frequency division are outputted. A selector control circuit 205 decides which of the pulses is to be selected and when a phase error accumulated value exceeds a prescribed value, 1/10 frequency division is selected.
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Inventors:
SAKURAI KEIICHI
Application Number:
JP13778492A
Publication Date:
November 19, 1993
Filing Date:
April 30, 1992
Export Citation:
Assignee:
CASIO COMPUTER CO LTD
International Classes:
H03K23/64; (IPC1-7): H03K23/64