PURPOSE: To realize a frequency division circuit capable of a prescribed operation even when the electric characteristics of a transfer gate and an inverter circuit are changed by providing a bias compensation circuit on this circuit.
CONSTITUTION: An inverter circuit consists of a switching stage 21 and a source follower stage 31. A bias compensation circuit 51 composed of the same kind of components as the components constituting the inverter circuit is provided between the source follower stage 31 and transfer gates M9, M11 and an output voltage is fed to the gate of the transfer gates M9, M11. Thus, even when the electric characteristics of components of the inverter circuit and the transfer gate are changed, since the transfer gate is in on/off operation surely in response to the input clock voltage, the desired circuit operation is obtained, thereby improving the reliability.
JPS62192096 | SHIFT REGISTER |
JPH0490227 | SYNCHRONIZATION DETECTOR |
WO/2010/108037 | FREQUENCY DIVIDER WITH SYNCHRONIZED OUTPUTS |