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Patent Searching and Data


Title:
FREQUENCY DIVISION CIRCUIT
Document Type and Number:
Japanese Patent JPH0447712
Kind Code:
A
Abstract:

PURPOSE: To set a frequency division ratio optionally by inputting a clock to an input terminal of a counter, inputting a ripple carry output of the counter to a load input terminal, setting a preset value in the timing of the carry output and obtaining a frequency division output of the preset value from the ripple carry output terminal.

CONSTITUTION: A clock is inputted to an input terminal of a counter 9, a ripple carry output 10 of the counter 9 is inputted to a load input terminal, a preset value is set in the timing of the carry output and a frequency division output of a preset is obtained from the ripple carry output by a frequency divider circuit. That is, a preset input 13 deciding the frequency division ratio is set in the timing of the ripple carry output 10 and the preset value is inputted externally to the preset input terminal 12. Thus, the frequency division ratio is optionally set without provision of a comparator deciding the frequency division ratio to the outside of the counter 9.


Inventors:
IDA JUICHIRO
Application Number:
JP15599390A
Publication Date:
February 17, 1992
Filing Date:
June 14, 1990
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03K23/66; (IPC1-7): H03K23/66
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)