PURPOSE: To obtain a frequency division circuit hardly malfunctioning due to a radiant ray by processing majority decision to signals outputted from flip-flop inverting output terminals and leading a majority decision signal to a frequency output terminal and a data terminal.

CONSTITUTION: When a clock signal 100 changes from '0' to '1', D flip-flops 1∼3 read an output signal 107 of an OR circuit 7 inputted to the respective data terminal, hold it and output its inverting logic signal to an inverting output terminal (Q'). The output 107 of the OR circuit 7 is constituted that it is '1' when ≥2 of outputs 101∼103 of the D flip-flop 1∼3 are '1' and '0' is outputted when ≥2 are '0'. Thus, even when one D flip-flop 1∼3 are '1' and '0' is outputted when ≥2 are '0'. Thus, even when one D flip-flop is malfunctioned due to a radiant ray and the state inversion takes place, a correct signal is applied to the data terminals of all the flip-flops.