Title:
FREQUENCY MEASURING CIRCUIT
Document Type and Number:
Japanese Patent JP3691310
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a frequency measuring circuit which provides high measurement precision even in the case of a short counting period or a reference clock having a low frequency.
SOLUTION: In the frequency measuring circuit, plural frequency measuring units 10, 20, and K0 and provided which count a reference clock Cb in a counting period which has a prescribed wave number of an input signal Cin, and the counting periods in frequency measuring units are shifted from one another to count the reference clock. An adder 14 is provided which adds counted numbers of plural frequency measuring units. Since the counting period is shifted, there is little probability that the phase of the input signal and that of the reference clock coincide with each other at the start and the end of counting in all frequency measuring units even if they coincide with each other in one frequency measuring unit. Consequently, the added counted number is used to perform frequency measurement of high precision. The counting periods in frequency measuring units are only shifted and overlap with one another to eliminate the need of extending the total measurement period.
More Like This:
| JPS63309867 | PHASE DISCRIMINATING CIRCUIT |
Inventors:
Kazuaki Oishi
Hideki Ishida
Hideki Ishida
Application Number:
JP29998699A
Publication Date:
September 07, 2005
Filing Date:
October 21, 1999
Export Citation:
Assignee:
富士通株式会社
International Classes:
G01R23/10; H03K21/02; (IPC1-7): H03K21/02; G01R23/10
Domestic Patent References:
| JP2287114A | ||||
| JP9043366A | ||||
| JP57211070A |
Attorney, Agent or Firm:
Kenji Doi
Hayashi Tsunetoku
Hayashi Tsunetoku