PURPOSE: To set a frequency interval of an output signal to 1/N of a frequency of a reference signal by adding an output of an offset generating circuit to a content of a fraction value register every time a phase adder overflows and a carry is generated.

CONSTITUTION: Every time a phase adder 7 overflows and a carry is generated, an output of an offset generating circuit 11 is inputted to an offset adder 12 and added to a content of a fraction value register 6 and the result is inputted to a phase adder 7. Thus, the adder 7 overflows every time the sum reaches 2n-L equivalently. That is, carries are generated for F times for 2n-L clocks. A frequency division ratio setting circuit 10 sets a frequency division ratio of a variable frequency divider 2 to M+1 when a carry is generated from the adder 7 and sets the frequency division ratio of a variable frequency divider 2 to M when no carry is generated from the adder 7. Thus, the frequency division ratio of the variable frequency divider is set to M+1 for F times for 2n-L clocks and set to M for (2n-L-F) times.