To provide a frequency synthesizer having a broad output frequency range and an excellent C/N characteristic.
A PLL is configured to include: a reference frequency oscillator 1; a phase comparator 2; a loop filter 3, a voltage-controlled oscillator 4 having a first control voltage terminal 6 for high control sensitivity and a second control voltage terminal 7 for low control sensitivity; a frequency divider 5; and a changeover switch 8 for switching the first and second control voltage terminals 6, 7. The changeover switch 8 is thrown to a position of connecting the loop filter 3 to the first control voltage terminal 6 in a state of PLL phase locking so that a broad frequency range can be covered in the phase locking process. Further, the changeover switch 8 is thrown to a position of connecting the loop filter 3 to the second control voltage terminal 7 to stably obtain an excellent C/N characteristic after the phase locking.
HIRANO SHUNSUKE
Hironori Honda
Toshimitsu Ichikawa
Takeshi Takamatsu
Yuriko Hamada
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