PURPOSE: To change the converting gain, by using a counter producing an output while a clock pulse is counted for a prescribed count from a leading of an input- signal, and taking a logical sum or product between an output of the counter and the clock pulse as a converter output.
CONSTITUTION: A counter 2 generates an output Q, while the counter counts clock pulses CK1 of a prescribed number from the leading of an input F. A selection circuit 3 selects the clock pulses CK1 from a clock pulse generating circuit 1 and a clock CK2 having different pulse width from that of the CK1. A logical sum circuit 4 produces a clock pulse at the part of Q=L by taking the logical sum between the selected clock and the counter ouptput Q, increases the average voltage of a converter and changes the conversion gain. In using a logical product circuit instead of the logical sum circuit 4, the part of Q=H is interrupted with the clock and the conversion gain is changed similarly.
SESATO TSUTOMU
Next Patent: REFERENCE VOLTAGE GENERATING SYSTEM IN DIGITAL-TO-ANALOG CONVERTER