Title:
FULL-WAVE RECTIFICATION INTEGRATING CIRCUIT
Document Type and Number:
Japanese Patent JPS60180475
Kind Code:
A
Abstract:
PURPOSE:To obtain a DC voltage accurately rectilinearly proportional to an input AC voltage by inserting a buffer circuit between a rectifier and an integrator. CONSTITUTION:A buffer circuit 57 of an operational amplifier and a buffer circuit 58 are inserted to between a half-wave rectifier 100 and an integrator 110, thereby eliminating the difference between the offset voltage of a rectifier side and the offset voltage of the integrator at the integrated output and a current to a resistor R7. Thus, a DC voltage which is accurately rectilinearly proportional to the input AC voltage can be obtained.
Inventors:
HAMAGURI KENJI
SAKAI TAKAO
SAKAI TAKAO
Application Number:
JP4866784A
Publication Date:
September 14, 1985
Filing Date:
March 13, 1984
Export Citation:
Assignee:
MINOLTA CAMERA KK
International Classes:
A61B5/145; A61B5/1455; A61B5/1495; A61B5/15; G01N21/27; G01N33/49; H02M7/21; (IPC1-7): A61B5/14; G01N21/27; G01N33/49
Attorney, Agent or Firm:
Aoyama