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Patent Searching and Data


Title:
FUNCTION GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JPH1093437
Kind Code:
A
Abstract:

To reduce the error of an output signal level to an input signal level by allowing a ΔΣ modulator to output probabilistically plural digital signals according to an analog input signal level so as to reduce the scale of a digital decoder.

The ΔΣ modulator 1 probabilistically outputs plural N-bit digital signal according to the analog input signal level. Next the digital decoder 2 is provided with the hard wired recorder of N-bit input and M-bit output and the memory of an M-bit word length with an N-bit address and outputs an M-bit digital signals. DA converter 3 converts this to an analog signal. A next low-pass filter 4 is provided with an active filter and a passive filter consisting of a resistor and a capacitor to allow prescribed low-pass components to pass. As the plural digital signals are outputted probabilistically according to the analog input signal level like this, a digital decoder scale is small and the error of the output signal is little with respect to an input level.


Inventors:
HARA SUSUMU
Application Number:
JP24743296A
Publication Date:
April 10, 1998
Filing Date:
September 19, 1996
Export Citation:
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Assignee:
ASAHI CHEMICAL MICRO SYST
International Classes:
H03M3/02; H03M7/50; (IPC1-7): H03M3/02; H03M7/50
Attorney, Agent or Firm:
Tetsuya Mori (2 others)