FUSE LATCH CIRCUIT - TOSHIBA CORP

Title:

FUSE LATCH CIRCUIT

Document Type and Number:

Japanese Patent JP2004246992

Kind Code:

A

Abstract:

To initialize a fuse latch circuit stably and with low current consumption.

One end of a fuse is connected to a ground point through a transistor N1A, and the other end is connected to a node VaA. For example, when the fuse is connected, the node VaA and an output signal USEOTn are "L" when a control signal INTV is "H". When the control signal INTV becomes "L", a transistor P1A is turned on, and the VaA is pre-charged. The transistor P1A is pre-charged at high speed because of its low on resistance. When the control signal INTV becomes "H", a transistor N1A is turned on, and the VaA is discharged at high speed.

Inventors:

OIKAWA KIYOHARU
HEGI YASUHIRO
MARUYAMA KIMIO
KUZUNO NAOKAZU

Application Number:

JP2003037180A

Publication Date:

September 02, 2004

Filing Date:

February 14, 2003

Export Citation:

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Assignee:

TOSHIBA CORP
TOSHIBA LSI SYSTEM SUPPORT KK

International Classes:

G11C17/18; G11C29/00; G11C29/04; H02H5/04; H01L21/82; H03K3/037; (IPC1-7): G11C29/00; H01L21/82; H03K3/037

Attorney, Agent or Firm:

Takehiko Suzue
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Sadao Muramatsu
Ryo Hashimoto

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