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Title:
ガロア拡大体・積算/積算加算・積和演算装置
Document Type and Number:
Japanese Patent JP5266354
Kind Code:
B2
Abstract:
A Galois field multiply/multiply-add/multiply-accumulate system includes a multiplier circuit for multiplying two polynomials with coefficients over a Galois field to obtain their product; a Galois field linear transformer circuit responsive to the multiplier circuit for predicting the modulo remainder of the polynomial product for an irreducible polynomial; a storage circuit for supplying to the Galois field linear transformer circuit a set of coefficient for predicting the modulo remainder for a predetermined irreducible polynomial; and a Galois field adder circuit for adding the product of the multiplier circuit with a third polynomial with coefficients over a Galois field for performing the multiplication and add operations in a single cycle.

Inventors:
Joseph Stain
Heim Primo
Yaniff Sapphire
Application Number:
JP2011033194A
Publication Date:
August 21, 2013
Filing Date:
February 18, 2011
Export Citation:
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Assignee:
Analog Devices Inc.
International Classes:
G06F17/10; G06F7/00; G06F7/60; G06F7/72; H03M13/01
Domestic Patent References:
JP200155640A
JP2001194996A
JP200166988A
JP63132532A
JP60217440A
JP54151339A
JP63282777A
JP62500326A
JP60144834A
JP2006503382A
Attorney, Agent or Firm:
Yasuhiko Murayama
Masatake Shiga
Takashi Watanabe
Shinya Mitsuhiro



 
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