To provide a game machine in which, when outputting a reset signal from reset means to a plurality of control means, each of the control means can be reset accurately by suppressing adverse influences caused by noise.
In a game machine, signal lines of a reset signal 22 are provided with buffers BF3-BF8 for control boards C, H, D, S, L and B, respectively. Therefore, when outputting the reset signal 22 from power failure monitoring means 20 to all the control boards, the reset signal 22 can be outputted accurately by suppressing influences of noise. Namely, the power failure monitoring circuit 20 is connected to the control boards by a cable or the like and the signal lines elongate but the reset signal 22 is outputted surely by suppressing influences of noise, thus allowing the control boards to be reset surely, preventing the reset signal 22 from being outputted erroneously, and preventing the control boards from being reset erroneously.
TAKETOMI TATSUNORI
SUZUKI HIROMASA
| JP2001276325A | 2001-10-09 | |||
| JP2001300014A | 2001-10-30 | |||
| JPH0768021A | 1995-03-14 | |||
| JP2000037508A | 2000-02-08 | |||
| JPH03251279A | 1991-11-08 | |||
| JP2001276325A | 2001-10-09 |