PURPOSE: To shorten considerably the time needed for a working test of the output signal of a variable control signal generating circuit and to reduce the cost of said signal generating circuit, by using a means to vary the count clock frequency of a counter.

CONSTITUTION: A decoder control circuit 20 delivers the decoded data Df by set signals supplied to external terminals P1∼Pk. Then a clock selection decoder 18 selects one of count clocks F1∼Fj of different frequencies to use it to a count input of an up/down counter 10. A decoder 12 performs a logical operation based on the parallel count contents Q1∼Qn of the counter 10 as well as duty basic clocks 1∼m consisting of different clock groups. Thus an output pulse signal 0 is obtained, and the duty ratio Dx increases and decreases with the signal 0.