PURPOSE: To reduce the burden of CPU by constituting a system in such a way that respective memory spaces and a common memory space are given to respective sub-systems and the common memory space simultaneously executes global transfer to respective sub-systems.

CONSTITUTION: In global transfer, main CPU successively outputs the addresses of 20,000-20FFF to an address bus and loads one byte data to be transferred on a data bus DB. Thus, a decoder DEC 2 sets the outputs of gates G1-Gn to L-levels and respective dual port RAM DPRs of the sub-systems to be active. Respective DPRs write data on the data bus in the addresses which lower three bits on the address bus show. In the other transfer, main CPU outputs addresses in 1,000-1nFFF to a bus AB and writes one byte data in the addresses which the lower three bits of the bus AB show in DPR concerned. Thus, global processing is attained by one software processing if writing is executed in a global address, and the burden of CPU can be reduced.