PURPOSE: To provide a gradation driving circuit for an active matrix liquid crystal display device capable of correctly writing data bus potential on a liquid crystal cell in the time when a scanning signal is in a conductive state.
CONSTITUTION: This circuit is provided with a shift register circuit 21 succcessively transferring the gradation data with K bits (K is an integer of 2 or more), a latch circuit 22 storing upper (m) bits among the output, a pulse width conversion circuit 23 inputting the stored upper gradation data and converting them to widths according to the data, an analog switch changeover circuit 24 making low-order (n) bits among the output of the shift register circuit 21 input information and selecting plural (2n) gradation reference voltages and an analog switch 26 selected by an AND between the output of the pulse width conversion circuit 23 and the low-order gradation data (n bits), and 2n kinds of gradation reference voltages with step voltage values different from each other are outputted by 2n pieces of analog switches 26a, 26b for one output, and the gradation driving is performed.
TOYAMA HIROSHI
TOKURA KAZUO
HAMANO HIROSHI
