Title:
GRADATION TYPE DISPLAY METHOD OF DOT MATRIX TYPE
Document Type and Number:
Japanese Patent JPH03230118
Kind Code:
A
Abstract:
PURPOSE:To allow multigradation display by constituting the image for one frame of plural field images and lighting display elements by as much as the number of times of display determined according to brightness for displaying respective picture elements. CONSTITUTION:The image for one frame is constituted of, for example, 3 field images and after the bit data and luminance data of these video signals are temporarily stored in a RAM1. the data are read out into a CPU2 and are converted to the data signals as to how many times the elements are lighted in the three field images. Namely, the four-gradation display is executed by converting the signals to quaternary signals of 3-times lighting for the max. brightness, 2-times lighting for the 2/3 brightness., 1-time lighting for the 1/3 brightness and no-lightness. These signals are written into video memories 5 to 7 by a timing circuit 3 and thereafter, the image displaying is executed through a gate circuit 8 for outputting and a P/S converting circuit 9.
Inventors:
MIYATA MASATAKA
Application Number:
JP2654890A
Publication Date:
October 14, 1991
Filing Date:
February 05, 1990
Export Citation:
Assignee:
SHARP KK
International Classes:
G02F1/133; G09G3/36; H04N5/66; (IPC1-7): G02F1/133; G09G3/36; H04N5/66
Domestic Patent References:
| JPH01206395A | 1989-08-18 | |||
| JPS6169036A | 1986-04-09 |
Attorney, Agent or Firm:
Nishida Arata