To decrease an extent of an n-type invert damage region, and exhaust efficiently surplus carriers generated in a deeper region of a substrate, by a method wherein a extent width of the n-type invert damage region formed on a surface of a pixel isolation trench for isolating an n-type region is made predetermined times a depth of the pixel isolation trench.
In a Hg-based II-VI group compound semiconductor device, a pixel isolation trench 3 for isolating an n-type region 2 is formed in a p-type Hg-based II-VI group compound semiconductor layer 1, and also an extend width of an n-type invert damage region formed on a surface of the pixel isolation trench 3 is made 2.3 times or less a depth of the pixel isolation trench 3. Thus, even when the deeper pixel isolation trench 3 is formed at a high aspect ratio, it is possible to enhance an integral degree. Furthermore, the pixel isolation trenches 3 are formed in a latticelike manner, or mutually electrically independently surrounding the n-type region 2, and are set as an absorption region of surplus carriers 8 generated in an intermediate region of the adjacent n-type region 2.
ARINAGA KENJI
SUDO HAJIME
FUJIWARA KOJI
KAJIWARA NOBUYUKI
