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Patent Searching and Data


Title:
HIGH-EFFICIENCY LINEAR AMPLIFIER
Document Type and Number:
Japanese Patent JPH0715244
Kind Code:
A
Abstract:

PURPOSE: To make an amplifier sufficient in dynamic range corresponding to an input signal and high in efficiency by using a four-terminal FET added with a threshold voltage controlled electrode as an amplifier and impressing a voltage at a certain level corresponding to the amplitude of this input signal to this electrode.

CONSTITUTION: An amplitude detection circuit 2 detects a peak level in the amplitude of the input signal with the passage of time and supplies a level signal expressing the size of this amplitude to a bias control circuit 7, and the threshold control voltage is provided in the circuit 7 and impressed to a threshold voltage controlled electrode 3a of a four-terminal FET 3. Corresponding to the amplitude of the envelope of the input signal, the bias control circuit 7 sets threshold control voltage to be impressed to the electrode 3a of the FET 3. At such a time, the threshold control voltage to the FET 3 corresponding to the maximum value of the amplitude is decided so as to perform the A-class operation when the envelope amplitude is maximum. When the envelope amplitude is reduced, the threshold voltage of the FET 3 is changed to the positive side by changing the voltage to be impressed to the electrode 3a from the threshold control voltage to the negative direction.


Inventors:
NAGAOKA MASAMI
ISHIDA KENJI
Application Number:
JP15695193A
Publication Date:
January 17, 1995
Filing Date:
June 28, 1993
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H03F1/02; H03F1/32; H03G3/30; H03G5/16; (IPC1-7): H03F1/02; H03F1/32; H03G3/30; H03G5/16
Attorney, Agent or Firm:
Kazuo Sato (3 others)