Title:
HIGH-FREQUENCY CIRCUIT
Document Type and Number:
Japanese Patent JP3864477
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To make current stability compatible with power management property by connecting a current stabilizing element and an N-type enhancement mode electric field effective transistor(FET), etc., in series between the negative-side electrode of an active element and the negative side power source.
SOLUTION: One tip of a resistance 23 is connected to the source of an FET 14 as the current-stabilizing element. An N-type enhancement mode FET 26 as a switch element on/off-controlling a current is connected the other end of the resistance 23 and a ground being the negative side power source. Namely the drain of a mode FET 26 is connected to the other end of the resistor 23, and its source is connected to the ground. The gate of FET 26 is connected to an on/off control terminal 28 through a resistance 27. The mode FET 26 and the resistance 27 constitutea power source disconnecting circuit 29. Then the voltage Vgs between the source and gate of FET 14 is negatively fed back through the resistor 23, with respect to the variation of a current Idd caused by the variation of a threshold value voltage Vth.
Inventors:
River Saki Hidetoshi
Application Number:
JP2620597A
Publication Date:
December 27, 2006
Filing Date:
February 10, 1997
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H03F1/02; H03F3/193; (IPC1-7): H03F3/193
Domestic Patent References:
| JP57168510A | ||||
| JP54071967A | ||||
| JP58147314U |
Attorney, Agent or Firm:
Funabashi Kuninori