PURPOSE: To realize an input impedance in the order of several hundreds of megohms and to decrease variation of a DC level by conneting a base of an emitter follower to an input base of an emitter follower amplifier circuits connected in two stages and using a current flowing to the base as a bias current.

CONSTITUTION: Transistors (TRs) Q1, Q3 constitute the emitter follower amplifier of complementary connection using PNP and NPN TRs, TRs Q2, Q4 form a bias circuit, and TRs Q5, Q6 are a current source comprising a current mirror similarly. The impedance viewed from a point A toward the emitter follower amplifier is nearly β1, β3, R1 and the impedance of the bias circuit to which a bias current IB is fed is nearly β2×β4 times the collector resistor of the TRQ5, where β1, β2, β3 and β4 are current amplification factors of the TRs Q1, Q3 and Q2, Q4 respectively. Thus, the impedance of the circuit viewed from the input terminal Ti is 100MΩ or over even if β1=β4=50 and β2=β3=150.