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Title:
HIGH-RATE POLISHING METHOD
Document Type and Number:
Japanese Patent JP2010155338
Kind Code:
A
Abstract:

To provide a method for polishing with a polishing pad for an increase in wafer yield by increasing removal rate to increase throughput.

A substrate is fixed to a carrier fixture having a channel-free surface. The method includes a process of fixing the substrate to the carrier fixture with the channel-free surface adjacent and parallel to a polishing surface of the polishing pad. The polishing pad has multiple grooves with high-rate paths. The method includes a process of applying a polishing medium to the polishing pad adjacent to the carrier fixture, and a process of polishing the substrate with the polishing pad and the polishing medium by rotating the polishing pad and the carrier fixture, wherein the channel-free surface of the carrier fixture is pressed by the polishing pad to prevent the flow of the polishing medium to the substrate, and the high-rate groove paths cross the carrier fixture to promote the flow of the polishing medium to the substrate.

COPYRIGHT: (C)2010,JPO&INPIT


Inventors:
MULDOWNEY GREGORY P
Application Number:
JP2009288689A
Publication Date:
July 15, 2010
Filing Date:
December 21, 2009
Export Citation:
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Assignee:
ROHM & HAAS ELECT MAT
International Classes:
B24B37/04; H01L21/304
Attorney, Agent or Firm:
Hajime Tsukuni
Yasuo Yanagibashi