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Title:
高抵抗シリコンオンインシュレータ構造及びその製造方法
Document Type and Number:
Japanese Patent JP6972282
Kind Code:
B2
Abstract:
A multilayer structure is provided, the multilayer structure comprising a semiconductor on insulator structure comprises an insulating layer that enhances the stability of the underlying charge trapping layer.

Inventors:
Jeffrey El Revert
Liu Ching Min
One Gun
Andrew M Jones
Application Number:
JP2020194948A
Publication Date:
November 24, 2021
Filing Date:
November 25, 2020
Export Citation:
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Assignee:
GlobalWafers Co.,Ltd.
International Classes:
H01L21/02; H01L27/12
Domestic Patent References:
JP2018507562A
JP2015211061A
JP2015228432A
JP2017532758A
JP2017538297A
JP2014509087A
Foreign References:
WO2017212812A1
Attorney, Agent or Firm:
Norihito Yamao
Yasuo Yanagibashi