PURPOSE: To obtain a high speed histogram calculation circuit in which the speed of storing and reading picture data does not depend on the processing speed of a processor, which can read much stored picture data at high speed and at once, whose scale is small and which is made into hardware on the calculation processing of two-dimensional histogram which is required for a picture processing.

CONSTITUTION: CPU 1 managing the start and stop of the histogram calculation of picture data, two parallel DRAM 2 and 3 storing picture data of asynchronous input through an input buffer executing first-in first-out(FIFO),and outputting different serial data on a row and a column, DRAM controllers 4 and 5 controlling the operation of DRAM, a sequencer 6 controlling the DRAM controllers 4 and 5 and controlling the reading of picture data for calculating histogram from DRAM 2 and 3 and the storage of a histogram calculation result, two counters 8 and 9 calculating histogram from picture data outputted from DRAM 2 and 3 in serial and two output buffers 10 and 11 storing the calculation result of the counters 8 and 9 are provided.