Title:
HIGH SPEED INPUT BUFFER
Document Type and Number:
Japanese Patent JPS60192418
Kind Code:
A
Abstract:
An input buffer which can be used as a TTL to CMOS input buffer in a CMOS integrated circuit has a CMOS input inverter for receiving an external input signal. The typical threshold voltage of the P and N channel transistors is relatively low for high speed operation. At least one of the P and N channel transistors of the input inverter has the magnitude of its threshold voltage increased by applying appropriate back bias voltage in the well in which it resides.
Inventors:
RARU CHIYANDO SUTSUDO
Application Number:
JP2159285A
Publication Date:
September 30, 1985
Filing Date:
February 06, 1985
Export Citation:
Assignee:
MOTOROLA INC
International Classes:
H01L27/092; H01L21/8238; H03K3/3565; H03K19/00; H03K19/0185; H03K19/0948; H03K19/096; (IPC1-7): H01L27/08; H03K19/00; H03K19/094; H03K19/096
Domestic Patent References:
| JPS53103371A | 1978-09-08 |
Attorney, Agent or Firm:
Kugoro Tamamushi