PURPOSE: To provide the high-speed memory IC which can be read at a high speed.

CONSTITUTION: The memory IC is provided with a serial-parallel conversion shift register part 1 and converts a serial data input into (n)-bit parallel data and a parallel data latch part 2 is provided to hold the parallel data output of the serial-parallel conversion shift register part 1 for an (n)-bit period respectively. A storage part 3 is provided to write the data, held in the parallel data latch part 2, by (n) bits in parallel, and the data are read out by (n) bits in parallel; and a parallel-serial conversion shift register part 4 is provided to shift the data read out of the storage part 3 in parallel at each (n)-bit period in order, thereby generating a serial data output.