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Title:
HIGH SPEED SYSTEM FOR CONTINUOUS MULTIPLICATION WITH D-A CONVERTER
Document Type and Number:
Japanese Patent JPH0264786
Kind Code:
A
Abstract:

PURPOSE: To execute continuous multiplication at a high speed by outputting an arithmetic control signal according to a code bit, which is inputted at first out of digital data, and inputting a data bit train with following to the code bit.

CONSTITUTION: In order to execute multiplication between time sharing analog data, which irregularily obtain positive and negative values, and time sharing digital data to irregularily obtain the positive and negative values and to be serially given, a code arithmetic means 12 outputs the arithmetic result of code inversion / not-inversion for the analog data to the reference voltage terminal of a D-A converter 11. A digital data control means 13 outputs an arithmetic control signal, which controls whether analog code inversion is executed or not, to the code arithmetic means 12 in correspondence to the contents of the code bit which is inputted at first out of the digital data. Then, the data bit train to be inputted out of the digital data with following to the code bit is outputted to the data input terminal of the D-A converter 11. Thus, the multiplication can be executed at the high speed.


Inventors:
KAWASAKI TAKASHI
ENDO SHUICHI
TSUZUKI HIROYUKI
MATSUDA TOSHIHARU
ASAKAWA KAZUO
KATO HIDEKI
YOSHIZAWA HIDEKI
ICHIKI HIROMOTO
IWAMOTO HIROSHI
ISHIKAWA KATSUYA
TSUCHIYA CHIKARA
Application Number:
JP21510488A
Publication Date:
March 05, 1990
Filing Date:
August 31, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06G7/16; (IPC1-7): G06G7/16
Attorney, Agent or Firm:
Yoshiyuki Osuge (1 outside)