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Title:
HIGH VOLTAGE CMOS CIRCUIT
Document Type and Number:
Japanese Patent JPS54144169
Kind Code:
A
Abstract:
A CMOS circuit having high voltage capability is provided. At least one P channel transistor is coupled between a first voltage node and an output of the circuit. At least two N channel transistors are coupled in series between the output of the circuit and a second voltage node. The at least two N channel transistors each have a separate tub which is connected to the source of each respective N channel transistor. This arrangement of the N channel transistors provides at least one tub which is isolated from the voltage nodes when the output of the circuit is at a potential substantially equal to a voltage present at the first voltage node.

Inventors:
RICHIYAADO UORUTAA URUMAA
Application Number:
JP5200179A
Publication Date:
November 10, 1979
Filing Date:
April 26, 1979
Export Citation:
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Assignee:
MOTOROLA INC
International Classes:
H01L21/8238; H01L27/092; H03K17/10; H03K17/687; H03K19/0185; H03K19/0948; (IPC1-7): H01L27/08; H03K17/10; H03K17/60; H03K19/00