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Patent Searching and Data


Title:
HISTORY MEMORY SYSTEM
Document Type and Number:
Japanese Patent JPS5452931
Kind Code:
A
Abstract:

PURPOSE: To facilitate an easy detection of the fault occurrence place by selecting FF of the ratch within the data processor via the scan-out addressing function possessed by the service processor and then writing the history of the selected information into the history memory.

CONSTITUTION: Multi-chip mounting plate MCC possessing FF or the ratch of LSI chips 3-11W3-33 within the data processor is connected to service processor 5 via decoder 4 and through address line l1 and scan-out line l2. At the same time, history memory 6 and LSI chips 3-11W3-33 are connected via history information linel3, and line l2. is connected to memory 6 via gistory information line l4. Then the history of part of the part of the information is sritten fixedly into memory 6, and at the same time the optional information is selected among all information via the scan-out addressing function of processor 5. The selected information is then written into memory 6


Inventors:
TSUDOME MASATO
KIKUCHI NOBUYUKI
Application Number:
JP11908977A
Publication Date:
April 25, 1979
Filing Date:
October 05, 1977
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F12/16; G06F11/22; G06F11/34; G11C29/00; (IPC1-7): G11C29/00