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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH066531
Kind Code:
A
Abstract:

PURPOSE: To improve the frequency characteristic without gain reduction by increasing a conductance of a load transistor(TR) for an invalid period of a signal voltage of an impedance converter processing an input signal having a valid period and an invalid period alternately so as to increase a discharge current.

CONSTITUTION: A voltage from a constant voltage power supply 107 is impressed to a charge absorbing terminal of a drive TR 101, and output terminals of a charge supply terminal of the TR 101 and a charge absorbing terminal of a load TR 102 are used for a signal output section 106. A voltage of a clocked power supply 108 is impressed to the charge supply terminal of the TR 102. A prescribed control voltage is impressed to a load control input section 105 of the TR 102. The voltage of the power supply 108 is changed for a prescribed period in a potential to control charge supply quantity to the output section 106.


Inventors:
KOBUCHI HIROTO
KURODA TAKAO
Application Number:
JP16075692A
Publication Date:
January 14, 1994
Filing Date:
June 19, 1992
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04N1/028; H03F3/50; H04N1/04; H04N1/19; H04N5/335; H04N5/372; (IPC1-7): H04N1/04; H03F3/50; H04N1/028; H04N5/335
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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