Title:
基板の配線位置決定方法
Document Type and Number:
Japanese Patent JP4965307
Kind Code:
B2
Abstract:
A method of determining a wire pattern 11 formed by a plurality of wires W 1 , W 3 -W 6 , W 9 , and W 10 on a board, the method including: an area-graph constructing step of forming an area-graph 12 in the routing area 10 , the area-graph 12 having pins P 1 -P 10 and edges B 1 -B 16 connecting the pins P 1 -P 10 ; a covering-path set specifying step of positioning the pins P 1 , P 3 -P 6 , P 9 , P 10 on a plurality of paths L 1 -L 3 from a start point to an end point T which are two selected pins; a number and direction assigning step of sequentially assigning increasing numbers to the pins P 1 , P 3 -P 6 , P 9 , P 10 that each of the paths L 1 -L 3 passes, and directions to edges B 1 -B 16 ; a preliminary wire segment generating step of forming a preliminary wire segment toward an area enclosed by the edges B 1 -B 16 where the assigned directions are confluent from entry to exit sides of each of the pins P 1 , P 3 -P 6 , P 9 , P 10 ; and a wire pattern determining step of extending the preliminary wire segments to the outside of the routing area 10 without crossing each other, thereby producing the wire pattern 11.
Inventors:
Youji Kajiya
Application Number:
JP2007082600A
Publication Date:
July 04, 2012
Filing Date:
March 27, 2007
Export Citation:
Assignee:
Wang Shujin
International Classes:
G06F17/50; H01L21/82
Domestic Patent References:
| JP7199819A | ||||
| JP63314846A | ||||
| JP8190579A | ||||
| JP2004259293A | ||||
| JP2006268462A | ||||
| JP1062773A | ||||
| JP62109173A | ||||
| JP2000035986A | ||||
| JP63086493A | ||||
| JP4299464A |
Attorney, Agent or Firm:
Fujio Nakamae