Title:
レーザダイオードモジュール、デバイスおよびサブマウントモジュール上にチップを作製する方法
Document Type and Number:
Japanese Patent JP7433762
Kind Code:
B2
Abstract:
A chip on submodule includes a submount having a top surface, bottom surface and side surfaces. A positive electrode plate is affixed to a first portion of one side surface, the top surface and a first portion of the bottom surface. The positive electrode plated first portion of the one side surface and the top surface are interconnected. A connector electrically connects the positive electrode plated top surface to the first portion of the bottom surface. A negative electrode plate is affixed to a second portion of the one side surface and a second portion of the bottom surface. The negative electrode plated second portion of the one side surface and second portion of the bottom surface are interconnected. A laser diode is affixed to the positive electrode plated first portion of the one side surface and connected to the negative electrode plated second portion of the one side surface.
Inventors:
Victoria, Lolita
Runge, Lars
Runge, Lars
Application Number:
JP2018502044A
Publication Date:
February 20, 2024
Filing Date:
March 25, 2016
Export Citation:
Assignee:
Jabil Ink
International Classes:
H01S5/024
Domestic Patent References:
| JP497581A | ||||
| JP2009111395A |
Foreign References:
| DE102013201931A1 | ||||
| US20130322068 |
Attorney, Agent or Firm:
Masafumi Yanagida