膜パターンの作製方法

Japanese Patent JP5292224

B2

The invention provides a manufacturing method of a substrate having a film pattern including an insulating film, a semiconductor film, a conductive film and the like by simple steps, and also a manufacturing method of a semiconductor device which is low in cost with high throughput and yield. According to the invention, after forming a first protective film which has low wettability on a substrate, a material which has high wettability is applied or discharged on an outer edge of a first mask pattern, thereby a film pattern and a substrate having the film pattern are formed.

WO/2004/000567	MOLD TOOL METHOD OF MANUFACTURING A MOLD TOOL AND STORAGE MEDIUM FORMED BY USE OF THE MOLD TOOL
JP2013089899	VAPOR DEPOSITION APPARATUS AND GAS EJECTOR
JP5000510	Nanostructured monolayer forming methods and devices and devices containing such monolayers

Shinji Maekawa
Genki Fujii
Yuko Yamamoto
Masafumi Morisue

JP2009193830A

September 18, 2013

August 25, 2009

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Semiconductor Energy Laboratory Co., Ltd.

H01L21/469; H01L29/786; B05D1/12; B05D1/26; G02B5/20; G03F7/00; G09F9/30; H01L21/02; H01L21/28; H01L21/288; H01L21/3213; H01L21/336; H01L21/768; H01L29/423; H01L29/49

JP10283847A
JP2003332552A
JP2002289859A
JP2005334864A
JP2004006700A
JP6182980A
JP2001339072A
JP2003309265A
JP2004241769A
JP200593974A

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