Title:
フラッシュメモリセルの製造方法
Document Type and Number:
Japanese Patent JP4337970
Kind Code:
B2
Abstract:
Methods of manufacturing flash memory cells. During a cleaning process after an etching process for forming a control gate is performed, polymer remains at the sidewall of a tungsten silicide layer. Therefore, the sidewall of the tungsten silicide layer is protected from a subsequent a self-aligned etching process. In addition, upon a self-aligned etching process, the etch selective ratio of the tungsten silicide layer to a polysilicon layer is sufficiently obtained using a mixed gas of HBr/O2. Therefore, etching damage to the sidewall of the tungsten silicide layer can be prevented. As a result, reliability of the process and an electrical characteristic of the resulting device are improved.
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Inventors:
Fried scale
Application Number:
JP2002351129A
Publication Date:
September 30, 2009
Filing Date:
December 03, 2002
Export Citation:
Assignee:
HYNIX SEMICONDUCTOR INC.
International Classes:
H01L21/3065; H01L21/8247; H01L21/02; H01L21/3213; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP7161849A | ||||
| JP2000174235A | ||||
| JP9181054A |
Attorney, Agent or Firm:
Hiroyuki Nakagawa