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Patent Searching and Data


Title:
HYBRID INTEGRATED CIRCUIT MOUNTED BOARD AND PACKAGING METHOD BASED ON FILM CARRIER TECHNOLOGY
Document Type and Number:
Japanese Patent JPH03142895
Kind Code:
A
Abstract:

PURPOSE: To enable low cost, short delivery time, multi chips, and high density packaging by bonding a hybrid integrated substrate on a standardized board based on the application of film carrier technology.

CONSTITUTION: A manufacture side produces a packaged board in which components are mounted on a board standardized by way of an assembling process and the process of schematic design. Electric inspection and function trimming are carried out as for the packaged board. The user side forms a copper foiled lead continuously formed on a film base on tape. One of the lead is bonded with a hybrid integrated circuit board while the other of the lead is bonded with an outside circuit. On the surface of a printed board 1 are installed integrated circuits 21, 22, and 23, such as LSI, MSI, VLIS. A number of leads 3 are bonded from around here, which makes it possible to reduce the lead spans, say, 200μm or shorter, preferably 100μm or shorter, thereby enabling high density packaging.


Inventors:
NOSE TSUNETARO
Application Number:
JP28083589A
Publication Date:
June 18, 1991
Filing Date:
October 28, 1989
Export Citation:
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Assignee:
MITSUBISHI MATERIALS CORP
International Classes:
H05K3/36; H05K1/14; H05K3/34; (IPC1-7): H05K3/36
Attorney, Agent or Firm:
Mikio Nakajima