To suppress delay time due to hysteresis small by making a hysteresis voltage width narrow and also to perform fast operation.
A first voltage follower circuit for inputting voltage of a signal source 2, a second voltage follower circuit for inputting a reference voltage of a reference voltage source 1, a comparator 22 for comparing the respective output voltages with each other of the first and second voltage follower circuits, a current source 7 for changing current quantity caused to flow to the first and second voltage follower circuits, and a switch 21 for controlling current of the current source 7 according to the output results of the comparator 22 are provided, the hysteresis voltage width is narrowly set to suppress the delay time small due to the hysteresis, and a fast operation can be performed.
FUKAMIZU SHINGO