PURPOSE: To provide a parallel array machine for expressing the floating point of data, and calculating the data in the array of a processor for executing the data having multi byte width data flow which can be operated in an SIMD (single instruction multiple data system) mode.
CONSTITUTION: This system is constituted of an array 406 of a picket, communication network, input and output system, microprocessor, canned routine processor 408, and SIMD controller. An SIMD type array processor equipped with a parallel processing element can efficiently execute a floating point arithmetic operation by using a format and an executing configuration in each picket. This format is executed as a format suitable to higher precision than an IEEE 32 bit floating point format, and executed by a machine having a byte width (8 bit) data stream. The preferable format is constituted of four decimal part bytes constituted of code bits, 7 exponent part bits, and 8 bits, and the total is 40 bits.
JIEEMUZU UOREN DEIIFUENDERUFUA
PIITAA MAIKERU KOTSUGE
| JPH0440520A | 1992-02-10 |