Title:
【発明の名称】電子的な電力出力段用誤接続保護回路
Document Type and Number:
Japanese Patent JP2002525018
Kind Code:
A
Abstract:
A polarity reversal protective circuit for an electronic power output stage that can be driven via a drive circuit is described. In the case of an incorrect polarization of a supply voltage, power FETs are used in at least one supply terminal to interrupt a connection of the wrongly applied supply voltage to the drive circuit and the power output stage. A definite polarity reversal protection is obtained using a circuit that is improved with respect to cost and space requirement. A single N-channel power FET is looped, with its source-drain path, into the positive supply terminal of the supply voltage. The source terminal of the N-channel power FET is connected with the positive supply terminal. The gate terminal of the N-channel power FET is connected to a collector of a PNP transistor, which is additionally connected to an output of the drive circuit via a current-limiting resistor. An emitter of the PNP transistor is connected-via a diode that is conductive when the supply voltage is wrongly applied-to the positive supply terminal. The base of the PNP transistor is connected-via a base resistor-to a negative (ground) supply terminal of the supply voltage.
Inventors:
Peter Brown
Robert Cologne
Robert Cologne
Application Number:
JP2000569484A
Publication Date:
August 06, 2002
Filing Date:
September 03, 1999
Export Citation:
Assignee:
ROBERT BOSCH GMBH
International Classes:
H02H11/00; (IPC1-7): H02H11/00
Attorney, Agent or Firm:
Toshio Yano (4 outside)