Title:
【発明の名称】FETのソース‐ドレイン伝導路を使用した非線形性発生器
Document Type and Number:
Japanese Patent JP3041806
Kind Code:
B2
Abstract:
A distortion generator uses the source-to-drain conductive path of a FET as the nonlinear element, in either a reflective or transmissive mode. In the reflective mode, the signal is applied across the source-to-drain conductive path, and in the transmissive mode the source-to-drain conductive path is in series with the transmission path. The FET may be biased, and the gate impedance to reference potential aids in selecting the nonlinearity characteristic. Reflective embodiments of a predistortion equalizer include a circulator version and a 3 dB hybrid splitter version. Transmissive embodiments include a direct series embodiment, and another with a 3 dB splitter and a separator combiner. Limiter and log-amp uses are described.
Inventors:
Allen Katz
Shaver Saleh High Muchara
Shaver Saleh High Muchara
Application Number:
JP33093590A
Publication Date:
May 15, 2000
Filing Date:
November 30, 1990
Export Citation:
Assignee:
GENERAL ELECTRIC COMPANY
International Classes:
H01P1/00; H03F1/32; H03G1/00; H03H11/04; H04B1/10; H04B1/62; H04B3/06; (IPC1-7): H03F1/32; H03H11/04; H04B1/10
Domestic Patent References:
| JP6356008A | ||||
| JP60232706A |
Other References:
１９８９年電子情報通信学会秋季全国大会講演論文集［分冊２］、１９８９年８月１５日発行、ｐ．２−２５７
Attorney, Agent or Firm:
Tokuji Omanuma