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Title:
【発明の名称】ランダムアクセスメモリ用先取り書込みドライバ
Document Type and Number:
Japanese Patent JP2003516601
Kind Code:
A
Abstract:
A prefetch input write driver for a random access memory (RAM) and a RAM including the prefetch input write driver. The prefetch input write driver is especially for a synchronous dynamic RAM (SDRAM). The prefetch input write driver includes a data input stage receiving data, an enable stage receiving a corresponding data enable, and a write driver providing received data to a memory array in response to a write signal and the corresponding enable stage state. The data stage and the enable stage may each include two or more series connected three state drivers and a latch at the output of each three state driver. As data passes through the data stage a corresponding enable state is passed through the enable stage. Data is passed to the RAM array if the enable state indicates that data in the data stage is to be written into the array.

Inventors:
Hanson, David, Earl.
Killer grouper, Toshiaki
Mueller, Gerhard
Application Number:
JP2001543735A
Publication Date:
May 13, 2003
Filing Date:
December 05, 2000
Export Citation:
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Assignee:
Infineon Technologies North America Corporation
International Business Machines Corporation
International Classes:
G11C11/409; G11C7/10; G11C11/407; H03K17/22; H03K19/0175; (IPC1-7): G11C11/409; G11C11/407; H03K17/22; H03K19/0175
Attorney, Agent or Firm:
Kenzo Hara (3 outside)